Old post, but it’s an interesting question that I am also wondering.
The first way would be to avoid vias and just try to fanout the BGA pads on a single layer. It would have to be a low ball count component, as you say, otherwise at some point you would no longer be able to route out inner vias. I quickly sketched out some BGA patterns, and I was able to route out a 6x6 grid, but I ran into trouble with a 6x7 grid on a single layer (assuming only one trace can pass through each gap between pads).
So, if you keep ball count at or below 36, then you would need to consider the ink printing tolerances. The V-One can technically go down to 8mil (0.2mm) trace widths and spacing. Assume that spacing restriction also applies to the trace to BGA pad. So, then your minimum allowable BGA pitch would be = (ball diameter) + 0.6mm. The last term, 0.6mm, comes from the [trace width (0.2mm) + 2 * trace to pad spacing (0.2mm)] given that there are two spaces on either side of a trace routed between BGA pads.
Alternatively, you could try to print given a GERBER design that is using DRCs set to spacings smaller than what the V-One allows. Then, once the ink bakes, go over the spaces with a scalpel to remove the inevitible trace to pad shorts. It could be a useful method, and I’d like to try it sometime. I have used a scalpel to clean up IC pads that shorted to each other, so I imagine it is very doable.
For example, the ADAQ4003BBCZ is an ADC in a 7x7 BGA package. As I mentioned above, you would not be able to route out some of the inner balls, but let’s use the measurements as an example. The ball diameter is 0.45mm nominal, so the minimum pitch needed to ensure the V-One could route inner balls out between outer balls would be 0.45mm + 0.6mm = 1.05mm. The ball pitch for this ADC is 0.8mm, so no luck there There may be some BGAs out there that would be usable in this case, though. On the other hand, if you used a 2x2 or 3x2 BGA, then you could probably do just fine on a V-One since routing out inner balls would not be applicable.
The second method is to via out the BGA pads to another layer, as you mentioned. However, the head diameter of the 0.4mm rivets is 0.9mm. I think that alone would preclude you from utilizing this method on any of the commonly available BGAs. I think the JEDEC ball pitch spec maxes out at code E. Code E allows for ball pitches =>1.5mm, so I think it would be technically possible to use the 0.4mm rivets if you found an IC that had a very large ball pitch, but then solderability would likely be a serious concern given that these “vias” would be rivets rather than relatively flat traditional copper vias.
Hope that helps, it certainly helped me by forcing me to look all this up!